Relative to an amorphous silicon array substrates, a low-temperature polycrystalline silicon array substrate has advantages of high mobility, which may be hundreds times higher than that of amorphous silicon, very small size of thin-film transistor made therefrom, and a high response speed, so it is a type of array substrate for display panel which has been paid more and more attentions to, and has been more and more applied in organic electroluminescent displays and liquid crystal display panels with high resolution and high image quality. However, since the composition is generally complex and process procedures are numerous, particularly for a high-resolution display panel in which a plurality of thin-film transistors having very small sizes are often needed, the requirements for the achievement of the process, electrical properties, and reliability of the thin-film transistor array substrate are even higher. In the structure of a polycrystalline silicon thin-film transistor in the prior art as shown in FIG. 1, 1 is a substrate, 2 is an active layer, 3 is a gate electrode insulating layer, 4 is a gate electrode, 5 is an intermediate insulating layer, and 6 is a via hole. Here, if a low-temperature polycrystalline silicon array substrate is used in an LCD display panel product, the backlight source may irradiate the channel region of the active layer for a long time, which results in the deterioration of properties of the device, and low reliability of the product. In addition, it is difficult for an active layer prepared by an excimer laser crystallization process to control grain size and uniformity of crystal grains in the channel region. Also, as seen from FIG. 1, it is required in the structure of the prior art to form a via hole by etching the intermediate insulating layer and the gate electrode insulating layer. Generally, the intermediate insulating layer has a very large thickness, which is thousands of Angstroms or more. Therefore, the requirement for via hole etching is relatively high, and an exclusively-used etching apparatus such as ICP, ECCP, etc., is needed to meet the requirement, and it is prone to overetch the active layer to cause damage or form a bad contact between source drain metals and the source drain regions.